1. Field of Invention
This invention relates to read-only memories and more particularly to serially structured read-only memories.
2. Prior Art
Read-only memories (ROMs) perform the function of providing permanent storage of data. That is, when given a specific address, the output of the ROM will always be the same and cannot later be altered. ROM structures for metal oxide semiconductor field effect transistors (MOSFETs) include two types: static and dynamic. The static type requires more silicon area and are slower than the dynamic type. However, the dynamic type requires clocking circuitry to provide precharge voltages for specific nodes within the ROM not required by the static type. This invention relates to dynamic ROMs.
Prior art structures for dynamic ROMs consist of parallel and serial structures. The parallel structure includes at least one prechargeable node connected to several parallel-connected transistors. These transistors have gates that are connected to address decoding circuitry. When the specific address for that transistor is received, that transistor gate is turned on. If the node is not to be discharged for a specific address, the transistor for that address is not completely fabricated, thus preventing the node from being discharged. The serial structure for the ROM consists of several transistors serially connected to a chargeable node, each of these serially connected transistors has a gate that is connected to address decoding circuitry. During the addressing cycle, the transistor to be addressed is left in an OFF state and all the other serially connected transistors are turned ON. If the node is to be discharged for this address, the transistor is manufactured in a depleted state and acts as a short; thus with all the other transistors in a serial connection turned ON, the node will be discharged during the discharge cycle. Alternatively if the node is not to be discharged, the transistor is manufactured in its natural state and will act as an open during the addressing cycle. Therefore the node will remain charged.
The parallel structure is faster than the serial structure because the node is discharged through only one device. However, the serial structure requires less space on a semiconductor substrate because it requires fewer interconnections.
It is the object of this invention to provide a memory structure that takes advantage of both types of structures.